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Digital Audio Receiver with Sample Rate Convertor

Cirrus Logic CS8422
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The CS8422 is a monolithic 24-bit, 211 kHz asynchronous Sample Rate Convertor with a 216 kHz S/PDIF Receiver that represents integration of the CS8416 and the CS8421. The device’s primary value proposition is providing high quality sample rate conversion along with a digital interface in a small 32-pin QFN, and decodes audio data according to the EIAJ CP1201, IEC-60958, AES3, and S/PDIF interface standards.

This integrated feature set removes the requirement for system platforms to vary system clocking when integrating asynchronous digital interfaces such as S/PDIF. System integrators can now maintain a constant frequency, high quality system clock and provide a digital interface to external devices operating at various asynchronous samples rates from 32 kHz to 211 kHz.

Audio data is input through the digital interface receiver or a 3-wire serial audio input port. Audio is output through one of two 3-wire serial audio output ports. Serial audio data outputs can be set to 24, 20, 18, or 16-bit word lengths. Data in the digital interface receiver and serial audio input port can be up to 24-bits long. Input and output data can be completely asynchronous, synchronous to an external clock through XTI, or synchronous to the recovered master clock.

The CS84222 can be controlled through the control port in Software Mode or in a Stand-Alone Hardware Mode. In Software Mode, the user can control the device through an SPI or I2C control port.

The CS8422 is available in a space-saving QFN package in both Commercial (-40° C to +85° C) and Automotive (-40° C to +105° C) grades. The CDB4822 Development Board is also available for device evaluation and implementation suggestions.

Sample Rate Converter Features

  • 140 dB Dynamic Range
  • -120 dB THD+N
  • No External Master Clock Required
  • Supports Sample Rates up to 211 kHz
  • Input/Output Sample Rate Ratios from 6:1 to 1:6
  • Master Mode Master Clock/Sample Rate Ratio
  • Support: 64, 96, 128, 192, 256, 384, 512, 768, 1024
  • 16, 18, 20, or 24-bit Data I/O
  • Dither Automatically Applied and Scaled to Output Resolution
  • Multiple Device Outputs are Phase Matched

Digital Audio Interface Receiver Features

  • Complete EIAJ CP1201, IEC-60958, AES3, S/PDIF Compatible Receiver
  • 28 kHz to 216 kHz Sample Rate Range
  • 2:1 Differential AES3 or 4:1 S/PDIF Input Mux
  • De-emphasis Filtering for 32 kHz, 44.1 kHz, and 48 kHz
  • Recovered Master Clock Output: 64 x Fs, 96 x Fs, 128 x Fs, 192 x Fs, 256 x Fs, 384 x Fs, 512 x Fs, 768 x Fs, 1024 x Fs
  • 49.152 MHz Maximum Recovered Master Clock Frequency
  • Ultra-low-jitter Clock Recovery
  • High Input Jitter Tolerance
  • No External PLL Filter Components Required
  • Selectable and Automatic Clock Switching
  • AES3 Direct Output and AES3 TX Passthrough
  • On-chip Channel Status Data Buffering
  • Automatic Detection of Compressed Audio Streams
  • Decodes CD Q Sub-Code