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Lattice Memory Interfacing - overview

Lattice provides a wide range of high-performance interface solutions for the latest memory technologies. These solutions combine innovative silicon with Intellectual Property (IP) cores to provide robust solutions for networking applications.

Features

LatticeSC FPGA devices provide full-featured embedded high-speed memory controllers supporting DDRI/II SDRAM, QDR SRAM, and RLDRAM memory devices.
LatticeEC/ECP/XP/XP2/ECP2/M FPGA devices provide dedicated resources to align DQ and DQS signals, multiplex/de-multiplex to and from double data rate, and transfer data from the DQS clock domain to the system clock domain.
Lattice ORSPI4 FPSC contains an embedded QDR II memory interface providing 20+ Gbps bandwidth w/simple FIFO interface to FPGA.
Through the ispLeverCORE program, Lattice offers a variety of IP cores and Reference Designs for popular memory interfaces.

Memory Interface Standards, IP and Reference Designs

Memory Standard	I/O Standard	Max Clock Rate	Data Rate	Hard IP	Soft IP	Reference Designs
DDR SDRAM	SSTL 2.5V	200 MHz	400 Mbps	LatticeSC DDR/DDR2 SDRAM MACO Controller	DDR SDRAM Controller - Pipelined Non-Pipelined	DDR SDRAM Controller
DDR2 SDRAM	SSTL 1.8V	333 MHz	667 Mbps	LatticeSC DDR/DDR2 SDRAM MACO Controller	DDR2 SDRAM Controller - Pipelined
QDR I/II/II+ SRAM	HSTL 1.8V or 1.5V	350 MHz	700 Mbps	LatticeSC QDR MACO Controller		QDR Memory Controller
RLDRAM I/II	HSTL 1.8V	800 Mbps	400 MHz	LatticeSC RLDRAM MACO Controller

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