
DS8102/MAXQ3108: Chipset for Polyphase Energy meter
Maxim Integrated products is glad to introduce DS8102/MAX3108 Chipset, using low cost shunt instead of current transformer, reduce Bill of Material cost of polyphase energy meter.
The DS8102 contains two high-precision second-order delta-sigma modulators with programmable gains up to 32x. The modulators' outputs are encoded into a single bit stream to minimize the isolation and data-coupling cost.
The data processing is carried out in the MAXQ3108, a dual-core microcontroller that accepts three DS8102 output bit streams, then decodes and decimates that data to produce raw ADC samples across a wide dynamic range. The ADC samples are fed into the MAXQ3108's integrated digital signal processor that computes the power, energy, power factors, and RMS voltage and current parameters required for a multifunction electricity meter.
The DS8102 modulator and encoder and the MAXQ3108 microcontroller form a unique solution to the isolation and data-coupling challenge for today's polyphase energy meters. A three-phase meter uses three DS8102s and one MAXQ3108. Each DS8102 floats on the respective phase that it is measuring.
A DS8102 converts the voltage and current inputs into a high-frequency digital bit stream that is then coupled to the MAXQ3108 through a low-cost capacitor.
The MAXQ3108 is DC isolated from the three DS8102s, but AC coupled to them to accept the digital data bit streams from each. With each DS8102 isolated from the other phases and from the MAXQ3108, each phase can use a shunt resistor for its current sensing. The expensive current transformer is thus eliminated and BOM costs reduced significantly.
The MAXQ3108's DSP is also programmable, making the chipset suitable for a wide variety of industrial data acquisition applications where isolation between the physical signals and the data-acquisition instrument is required.
The dual-core MAXQ3108 contains two 16-bit RISC processors
The user core has the following resources:
- 64KB flash program memory
- 2kB data SRAM
- 16 bytes battery-backed (VBAT) data SRAM
- Digitally trimmable real-time clock
- SPI™, I²C, dual USART ports
- Hardware multiplier, three Manchester decoders, and three sinc3 filters
- 10MHz FLL with 32kHz input
The DSP core contains:
- 8KB user-loadable SRAM code memory
- 1kB data SRAM
- Hardware multiplier



