Renesas Introduces RX62N Connectivity MCU Group – Win a free Renesas Promotional Board
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The RX621 Group is built around the RX core and is equipped with 2 channels of USB 2.0 full-speed (Host, Function and OTG) and 1 channel of CAN as a communications interface. The products are designed to not put a restriction on applications based on their communication method; add-ons are used to achieve different communication methods. They are also equipped with a rich set of system fail-safe functions such as power-on reset (POR), low voltage detection (LVD), and an independent watchdog timer.
The RX62N Group is built around the RX core and is equipped with 1 channel of EtherC. 2 channels of USB 2.0 Full-Speed (Host, Function and OTG) and 1 channel of CAN (optional) as a communications interface. The products are designed to not put a restriction on applications based on their communication method; add-ons are used to achieve different communication methods. They are also equipped with a rich set of system fail-safe functions such as power-on reset (POR), low voltage detection (LVD), and an independent watchdog timer.
Specifications RX62N and RX621 Groups
CPU core: RX CPU
- Execution Unit:
- Integer operations, 5-stage execution pipeline
- 32-bit single precision Floating Point Unit compliant to IEEE-754 specification
- Digital Signal Processing:
- 48-bit MAC, 80-bit RMPA, 32-bit Barrel Shifter<
- Register Set:
- 9 X 32-bit Control Registers
- 16 X 32-bit General Purpose Registers
- 48-bit Accumulator Register
- Memory Protection Unit:
- Eight programmable protection regions
- Interrupt Control Unit:
- Configurable for Normal and Fast interrupt handling with option to dedicate up to four General Purpose registers for interrupt use
- On-chip Debug:
- JTAG or 2-wire
- High-speed trace (6-wire)
Maximum operating frequency: 100 MHz
Power supply voltage: 2.7 to 3.6V
Zero-wait Flash: Up to 512KB
Data Flash: Up to 32KB
SRAM: Up to 96KB
On-chip peripheral functions:
- Communication:
- Ethernet MAC (RX62N only)
> 10/100, full/half duplex
> Supports Xmit and Rcv IEEE-802.3
> 2KB SRAM buffers for xmit & recv w/DMA support
> Supports MII and RMII to external PHY - USB Full Speed Host or Device
> channels (BGA176 only), either can be host or device
> PHY included for both USB channels
> OTG operation with external Vbus switch - CAN Interface with 32 Mailboxes
- 6 SCI, 2 I2C, 2 SPI, 32-bit external data bus
- Ethernet MAC (RX62N only)
- Timers:
- Specialized for motor control, plus standard timers
- Data Movement:
- 4 Programmable DMA channels
- 85 DTC channels, linked-list control
- External DMA controller can drive color TFT-LCD with up to WQVGA resolution
- Analog:
- 8 channels 12-bit ADC, 1 us conversion time
- 2 channels 10-bit DAC
Packages: LGA85 (RX621 only), LQFP100, LQFP144, LGA145, BGA176
Win a Renesas Promotional Kit for RX62N
As part of the launch of the RX62N Family, Avnet Memec is proud to announce a special competition: click on the competition link on the left, and complete the brief on-line form, giving us your details and a brief explanation as to how you might use the RX62N in your application. The Top 10 answers will receive a free RPBRX62N.
The Renesas Promotional Kit (RPB) for RX62N has been designed to enable the user to quickly investigate the performance of the RX62N device family. Based on an embedded web server, a number of mini demonstration applications can be used to showcase the Ethernet controller, USB function and Floating Point Unit (FPU) found on the RX62N. Further investigation of the device and available RX development tools can be completed using the on-board Segger J-Link JTAG debugger and High-performance Embedded Workshop (HEW) IDE.
When combined with the 60 day (then becoming 128K) evaluation Renesas compiler and full source code of the web server and mini applications the RPB makes an ideal introductory platform for RX62N device family. The RPB pack contains everything the user needs to install and get going within minutes of opening it, there is no need to download anything from the web!