
Industry’s lowest jitter, most highly integrated jitter attenuating video clock generator IC
Silicon Laboratories has leveraged its proven DSPLL® technology to create the industry’s lowest jitter, most highly integrated jitter attenuating video clock generator IC. The Si5324 is the industry’s lowest jitter, most highly integrated video clock IC optimized for professional broadcast video applications. The Si5324 replaces traditional multi-component video PLL solutions with a single clock IC. By consuming less than 1/10th of the overall jitter budget required in next generation video applications, the Si5324 improves the odds of passing system jitter testing on the first try. In addition, the Si5324 provides any-rate frequency flexibility by generating virtually any output frequency from 2 kHz to 1.4 GHz from any input frequency ranging from 2 kHz to 710 MHz enabling a single IC design for multi-frequency applications.
The Si5324 targets broadcast video applications including video servers, video switchers/routers, and frame synchronizers. Broadcast video equipment requires low peak-to-peak jitter, a 10 Hz loop bandwidth PLL, and frequency flexibility to support a wide range of video formats. The Si5324 is also appropriate for opportunities in optical networking, wireless infrastructure and test and measurement. Broadcast video equipment provides image capture, encoding, decoding, processing, and transmission of standard-definition/high-definition (SD/HD) multimedia content within video studios. A typical broadcast video studio has numerous elements including multiple cameras, video switching, and local and remote video sources. All equipment within the studio must be synchronized to a master timing source known as the Master Sync Generator. This synchronization process is referred to as “gunlock.” Genlock ensures all video capture, conversion, editing, display, and distribution equipment preserve time (frame) alignment between video sources. All video equipment in the studio is interconnected by cables carrying high-speed digital video data streams conforming to SMPTE serial digital interface (SDI) specifications.
The jitter performance, integration, and frequency agility of the Si5324 expands Silicon Labs timing portfolio to address broadcast video. These customers typically use a high mix of XO/VCXOs, clocks, and buffer devices to complete their timing architectures. Broadcast video designs offer excellent opportunities for the Si5324 as well as the Si5338 clock generator and the Si59x multi-frequency XO/VCXOs. Silicon Labs’ any-rate precision clocks, multi-rate XO/VCXOs, clock generators and buffer products provide SD/HD clock generation in compliance with SMPTE standards for analog, DVI, SD-SDI, HD-SDI, and 3G-SDI. For additional video background, see application note

