The new Si5335 web-customizable, quad frequency clock generator/buffer from Silicon Labs is ideally suited for FPGA-based embedded computing, storage and communications systems.  It is the industry’s most easily customizable clock generator/buffer. The Si5335 generates up to eight output clocks at up to four unique frequencies to 350 MHz with sub-picosecond jitter. With its simple yet flexible ClockBuilder™ web configuration utility, factory-customized, pin-controlled devices are available in two weeks without minimum order quantity restrictions.

The device’s architecture is based on Silicon Labs’ proven MultiSynth™ technology, which simplifies timing challenges by integrating the frequency synthesis capability of four low jitter PLLs in a single device. To maximize design flexibility, each of the four differential or up to eight CMOS clocks is independently configurable to support any signal format and I/O voltage. This combination of frequency and format flexibility simplifies clock trees by replacing fixed frequency clock generators, buffers, discrete level translators and crystal oscillators (XOs) with a single device, minimizing cost, PCB area and power consumption. Cross selling opportunities exist with our Si5xx XO and VCXOs and jitter attenuating clocks (Si531x/2x/6x/7x), especially in PCI Express and FPGA-based networking, compute servers and storage applications.

The Si5335 clock generator/clock buffer family provides frequency flexible, sub-picosecond jitter clock sources required in FPGA and PCI Express-based networking, storage, compute server equipment, Ethernet switches/routers, metro/access communications equipment, PON, DSLAMs, network storage, wireless base stations, broadcast video, test and measurement and data acquisition. With its configurable I/O format and voltage support, ideal targets for the Si5335 are applications with FPGAs and/or SoCs requiring a mix of differential output formats besides HCSL used in traditional PCIe applications.